
68
CHAPTER 6. LAB TASK 4 - CUSTOM INSTRUCTIONS
Code Name Explanation Stands Alone
0xF F C0 SOF
0
Start of frame for baseline coded pictures. No
0xF F E0 APP
0
Application specific data used by JFIF. No
0xF F DA SOS Start of s can. The image data starts after
this marker segment.
No
0xF F Dn RST
n
Restart marker n(n = 0, 1...7), restart de-
coding after this marker.
Yes
0xF F D9 EOI End of image, data after this marker is ig-
nored.
Yes
Table 6.3: Important JFIF markers
6.6 Important Files For this lab task
In addition to the files listed in section 4.4.1 also the following files are important.
• or1200_lsu.sv: Load Store Unit, the module used by the or1200 processor to
load/store from/to memory.
• or1200_defines.v: Defines for the or1200 RTL code, look for
‘ifdef OR1200_SBIT_IMPL
.
• or1200_vlx_top.sv: A skeleton top level module for the set bit instruction.
• or1200_ctrl.sv: The instruction decoder.
• or1200_sprs.sv: Special purpose register control.
• jchuff.c: Code dealing with the Huffman-encoding.
6.7 Tips and tricks
In this section we have collected some notes that you might find useful.
• If you want to simulate the set bit instruction together with the rest of the system,
you will have to modify the monitor to run your test code right after the system
has started. See the directions in section 3.3.3 on how to modify the monitor.
• In order to improve the performance of the code you can remove some of the
performance counters. But all performance counters in jpegtest.c has to re-
main!
• How to write to a special purpose registers with address 0xC000 in C-code:
asm volatile("l.mtspr %0,%1,0x0" : : "r"(0xc000),"r"(value))
Komentarze do niniejszej Instrukcji